S5T8555 circuit equivalent, time slot assignment circuit.
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* Single, 5V operation Low power consumption: 5mW Controls four 1 CHIP CODEC Independent transmit and receive frame syncs ch.
A Transmit frame sync output which is normally low, and goes active-high for 8 cycles of BCLK when a valid transmit time slot assignment is made.
A Receive frame sync output which is normally low, and goes active-high for 8 cycles of BCLK when a val.
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